RE: [arm-gnu] Advanced SIMD instruction support

[Akshay Joshi <akshay.joshi@xxxxxxxxxxx>]

>	The assembler doesn't know about the VMSR opcode.  (I've checked the
>	documentation we have from ARM and I don't see a mention of that opcode.
>	 It's mentioned on ARM's website, but I don't see any documentation of
>	the actual assembly encoding.)  Do you have a non-NDA reference you can
>	point to regarding VMSR?

Some information about the VMSR encoding is provided in the "ARM
Architecture Reference Manual - ARMv7-A and ARMv7-R edition" (document
number - DDI 0406B). This document can be downloaded from the ARM website
for free but you have to register with them. The encoding details are
mentioned in Section "A7.8 - 8, 16, and 32-bit transfer between ARM core and
extension registers" (Page - A7-31 / 311) of this document.


>	However, the "msr" instruction in the GNU assembler does accept fpexc:
>		  msr fpexc, r1
>	is encoded as:
>	  	8:   eee81a10        fmxr    fpexc, r1
>	Is that the instruction you need?

I tried using this instruction but I get another error while assembling;
viz, "Error: selected FPU does not support instruction -- 'msr fpexc,r1'".
We pass the following options to the compiler / assembler :
	-march=armv7a
	-mfpu=neon

The document(DDI 0406B) says that "fmxr" is a former ARM assembly mnemonic
which has been replaced by the UAL mnemonic "vmsr". And it states that "msr"
instruction can modify only APSR / CPSR register bits.


Thanks,
--Akshay