RE: [arm-gnu] Illegal VFP instruction generated in thumb2 mode

["Woodruff, Richard" <r-woodruff2@xxxxxx>]

What kernel version and hardware are you running on?

The older ARM kernels didn't properly enable coprocessor access.

BTW, You expect to get a undef exception on first use for a process.  The kernel then sorts out if you have vfp hardware and turns it on.  However, as I said on earlier kernels some steps were missing.  I've used neon/vfp on our cortexA8 with out any difficult issues.

Regards,
Richard W.

> -----Original Message-----
> From: Daniel Jacobowitz [mailto:dan@xxxxxxxxxxxxxxxx]
> Sent: Wednesday, February 11, 2009 3:47 PM
> To: Bob Vandette
> Cc: arm-gnu@xxxxxxxxxxxxxxxx
> Subject: Re: [arm-gnu] Illegal VFP instruction generated in thumb2 mode
>
> On Wed, Feb 11, 2009 at 04:41:50PM -0500, Bob Vandette wrote:
> >>> The offending instruction is this:
> >>>
> >>> fmsr    s15, r4
> >>>
> >>> I didn't think s15 was supported register for this instruction in any
> >>> mode (ARM or Thumb)?
> >>>
> >>
> >> Yes, this is valid in both ARM and Thumb-2 mode.  fmsr moves between
> >> any core register and any single-precision VFP register.
> >>
> >
> > That's not what my Cortex-a8 technical reference states.
> >
> > Unless I'm reading it wrong, the fmsr instruction is an alias for the
> > vmov instruction.
> > The vmov instruction prohibits register 15 from being used in any mode and
> > register 13 from being used in thumb mode.
>
> That's <Rt>, so it's r13 [sp] and r15 [pc]; there are no restrictions
> on <Sn>.
>
> --
> Daniel Jacobowitz
> CodeSourcery