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#### 3.17.17 IA-64 Options

These are the ‘`-m`’ options defined for the Intel IA-64 architecture.

`-mbig-endian`
  Generate code for a big endian target. This is the default for HP-UX.
`-mlittle-endian`
  Generate code for a little endian target. This is the default for AIX5 and GNU/Linux.
`-mgnu-as`
`-mno-gnu-as`
  Generate (or don't) code for the GNU assembler. This is the default.
`-mgnu-ld`
`-mno-gnu-ld`
  Generate (or don't) code for the GNU linker. This is the default.
`-mno-pic`
  Generate code that does not use a global pointer register. The result is not position independent code, and violates the IA-64 ABI.
`-mvolatile-asm-stop`
`-mno-volatile-asm-stop`
  Generate (or don't) a stop bit immediately before and after volatile asm statements.
`-mregister-names`
`-mno-register-names`
  Generate (or don't) ‘`in`’, ‘`loc`’, and ‘`out`’ register names for the stacked registers. This may make assembler output more readable.
`-mno-sdata`
`-msdata`
  Disable (or enable) optimizations that use the small data section. This may be useful for working around optimizer bugs.
`-mconstant-gp`
  Generate code that uses a single constant global pointer value. This is useful when compiling kernel code.
`-mauto-pic`
  Generate code that is self-relocatable. This implies `-mconstant-gp`. This is useful when compiling firmware code.
`-minline-float-divide-min-latency`
  Generate code for inline divides of floating point values using the minimum latency algorithm.
`-minline-float-divide-max-throughput`
  Generate code for inline divides of floating point values using the maximum throughput algorithm.
`-mno-inline-float-divide`
  Do not generate inline code for divides of floating point values.
`-minline-int-divide-min-latency`
  Generate code for inline divides of integer values using the minimum latency algorithm.
`-minline-int-divide-max-throughput`
  Generate code for inline divides of integer values using the maximum throughput algorithm.
`-mno-inline-int-divide`
  Do not generate inline code for divides of integer values.
`-minline-sqrt-min-latency`
  Generate code for inline square roots using the minimum latency algorithm.
`-minline-sqrt-max-throughput`
  Generate code for inline square roots using the maximum throughput algorithm.
`-mno-inline-sqrt`
  Do not generate inline code for sqrt.
`-mfused-madd`
`-mno-fused-madd`
  Do (don't) generate code that uses the fused multiply/add or multiply/subtract instructions. The default is to use these instructions.
`-mno-dwarf2-asm`
`-mdwarf2-asm`
  Don't (or do) generate assembler code for the DWARF2 line number debugging info. This may be useful when not using the GNU assembler.
`-mearly-stop-bits`
`-mno-early-stop-bits`
  Allow stop bits to be placed earlier than immediately preceding the instruction that triggered the stop bit. This can improve instruction scheduling, but does not always do so.
`-mfixed-range=`register-range
  Generate code treating the given register range as fixed registers. A fixed register is one that the register allocator can not use. This is useful when compiling kernel code. A register range is specified as two registers separated by a dash. Multiple register ranges can be specified separated by a comma.
`-mtls-size=`tls-size
  Specify bit size of immediate TLS offsets. Valid values are 14, 22, and 64.
`-mtune=`cpu-type
  Tune the instruction scheduling for a particular CPU, Valid values are itanium, itanium1, merced, itanium2, and mckinley.
`-milp32`
`-mlp64`
  Generate code for a 32-bit or 64-bit environment. The 32-bit environment sets int, long and pointer to 32 bits. The 64-bit environment sets int to 32 bits and long and pointer to 64 bits. These are HP-UX specific flags.
`-mno-sched-br-data-spec`
`-msched-br-data-spec`
  (Dis/En)able data speculative scheduling before reload. This will result in generation of the ld.a instructions and the corresponding check instructions (ld.c / chk.a). The default is 'disable'.
`-msched-ar-data-spec`
`-mno-sched-ar-data-spec`
  (En/Dis)able data speculative scheduling after reload. This will result in generation of the ld.a instructions and the corresponding check instructions (ld.c / chk.a). The default is 'enable'.
`-mno-sched-control-spec`
`-msched-control-spec`
  (Dis/En)able control speculative scheduling. This feature is available only during region scheduling (i.e. before reload). This will result in generation of the ld.s instructions and the corresponding check instructions chk.s . The default is 'disable'.
`-msched-br-in-data-spec`
`-mno-sched-br-in-data-spec`
  (En/Dis)able speculative scheduling of the instructions that are dependent on the data speculative loads before reload. This is effective only with `-msched-br-data-spec` enabled. The default is 'enable'.
`-msched-ar-in-data-spec`
`-mno-sched-ar-in-data-spec`
  (En/Dis)able speculative scheduling of the instructions that are dependent on the data speculative loads after reload. This is effective only with `-msched-ar-data-spec` enabled. The default is 'enable'.
`-msched-in-control-spec`
`-mno-sched-in-control-spec`
  (En/Dis)able speculative scheduling of the instructions that are dependent on the control speculative loads. This is effective only with `-msched-control-spec` enabled. The default is 'enable'.
`-mno-sched-prefer-non-data-spec-insns`
`-msched-prefer-non-data-spec-insns`
  If enabled, data speculative instructions will be chosen for schedule only if there are no other choices at the moment. This will make the use of the data speculation much more conservative. The default is 'disable'.
`-mno-sched-prefer-non-control-spec-insns`
`-msched-prefer-non-control-spec-insns`
  If enabled, control speculative instructions will be chosen for schedule only if there are no other choices at the moment. This will make the use of the control speculation much more conservative. The default is 'disable'.
`-mno-sched-count-spec-in-critical-path`
`-msched-count-spec-in-critical-path`
  If enabled, speculative dependencies will be considered during computation of the instructions priorities. This will make the use of the speculation a bit more conservative. The default is 'disable'.
`-msched-spec-ldc`
  Use a simple data speculation check. This option is on by default.
`-msched-control-spec-ldc`
  Use a simple check for control speculation. This option is on by default.
`-msched-stop-bits-after-every-cycle`
  Place a stop bit after every cycle when scheduling. This option is on by default.
`-msched-fp-mem-deps-zero-cost`
  Assume that floating-point stores and loads are not likely to cause a conflict when placed into the same instruction group. This option is disabled by default.
`-msel-sched-dont-check-control-spec`
  Generate checks for control speculation in selective scheduling. This flag is disabled by default.
`-msched-max-memory-insns=`max-insns
  Limit on the number of memory insns per instruction group, giving lower priority to subsequent memory insns attempting to schedule in the same instruction group. Frequently useful to prevent cache bank conflicts. The default value is 1.
`-msched-max-memory-insns-hard-limit`
  Disallow more than `msched-max-memory-insns' in instruction group. Otherwise, limit is `soft' meaning that we would prefer non-memory operations when limit is reached but may still schedule memory operations.