#ident "kit/IDT364B/sbdnvram.c: Copyright (c) MIPS Technologies, Inc. All rights reserved."

/*
 * Copyright (c) 1998-2003 MIPS Technologies, Inc.
 * 
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 
 *      * Redistributions of source code must retain the above copyright
 *        notice, this list of conditions and the following disclaimer.
 *      * Redistributions in binary form must reproduce the above
 *      copyright
 *        notice, this list of conditions and the following disclaimer
 *        in the documentation and/or other materials provided with
 *        the distribution.
 *      * Neither the name of MIPS Technologies Inc. nor the names of its
 *        contributors may be used to endorse or promote products derived
 *        from this software without specific prior written permission.
 * 
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/* 
 * IDT364/sbdnvram.c: low-level interface to IDT 79S364 board NVRAM
 */


#include <stddef.h>
#include <mips/cpu.h>

#include "kit_impl.h"
#include "sbd.h"
#include "nvenv.h"
#include "x20c04.h"

/* Environment starts at base of NVRAM */
#define ENVOFFSET	0

unsigned int 
_sbd_nvram_size (unsigned int *nvoffs, unsigned int *nvsize)
{
    if (nvoffs) *nvoffs = ENVOFFSET;
    if (nvsize) *nvsize = XNV_SIZE - ENVOFFSET;
    return XNV_SIZE;	/* ??? */
}


void
_sbd_nvram_flush (int offs)
{
    /* initiate copy of RAM to EEROM */
    register volatile struct xnvram *xnv = PA_TO_KVA1(NVRAM_BASE);

    xnv->xnv_eeromw[ENVOFF_SPARE] = 0;
    mips_wbflush ();
    sbdusdelay (10000);		/* 10ms delay */
}


unsigned char
_sbd_nvram_getbyte(unsigned int offs)
{
    register volatile struct xnvram *xnv = PA_TO_KVA1(NVRAM_BASE);
    return (xnv->xnv_mem[offs] >> XNV_SHIFT) & XNV_MASK;
}


void 
_sbd_nvram_setbyte(unsigned int offs, unsigned char val)
{
    register volatile struct xnvram *xnv = PA_TO_KVA1(NVRAM_BASE);
    xnv->xnv_mem[offs] = val << XNV_SHIFT;
}


/*
 * Note: BigEndian byte-order data structure
 */
unsigned short
_sbd_nvram_getshort (unsigned int offs)
{
    return ((_sbd_nvram_getbyte(offs) << 8) | _sbd_nvram_getbyte(offs+1));
}


void
_sbd_nvram_setshort (unsigned int offs, unsigned short val)
{
    _sbd_nvram_setbyte (offs, (unsigned char)((val >> 8) & 0xff));
    _sbd_nvram_setbyte (offs+1, (unsigned char)(val & 0xff));
}


int
_sbd_nvram_hwtest (void)
{
    unsigned int offs = ENVOFFSET + ENVOFF_TEST;

    _sbd_nvram_setbyte (offs, 0xaa);
    _sbd_nvram_setbyte (offs+1, 0x55);
    if (_sbd_nvram_getbyte (offs) != 0xaa
        || _sbd_nvram_getbyte (offs + 1) != 0x55)
	return 0;

    _sbd_nvram_setbyte (offs, 0x55);
    _sbd_nvram_setbyte (offs + 1, 0xaa);
    if (_sbd_nvram_getbyte (offs) != 0x55
        || _sbd_nvram_getbyte (offs + 1) != 0xaa)
	return 0;

    return 1;
}
