#ident "kit/NEC5074L/sbdnvram.c: Copyright (c) MIPS Technologies, Inc. All rights reserved."

/*
 * Copyright (c) 1999-2003 MIPS Technologies, Inc.
 * 
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 
 *      * Redistributions of source code must retain the above copyright
 *        notice, this list of conditions and the following disclaimer.
 *      * Redistributions in binary form must reproduce the above
 *      copyright
 *        notice, this list of conditions and the following disclaimer
 *        in the documentation and/or other materials provided with
 *        the distribution.
 *      * Neither the name of MIPS Technologies Inc. nor the names of its
 *        contributors may be used to endorse or promote products derived
 *        from this software without specific prior written permission.
 * 
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/* 
 * NEC5074/sbdnvram.c: low-level interface to NEC DDB-Vrc5074 NVRAM
 */


#ifdef IN_PMON
#include <pmon.h>
#include <sde-compat.h>
#else
#include <stddef.h>
#include <mips/cpu.h>
#include "kit_impl.h"
#endif

#include "sbd.h"
#include "nvenv.h"
#include "ds1386.h"


unsigned int 
_sbd_nvram_size (unsigned int *nvoffs, unsigned int *nvsize)
{
    if (nvoffs) *nvoffs = ENVOFFSET;
    if (nvsize) *nvsize = TD_NVRAM_SIZE - ENVOFFSET;
    return TD_MEM_SIZE;
}


void
_sbd_nvram_flush (int offs)
{
}


__inline__ unsigned char
_sbd_nvram_getbyte(unsigned int offs)
{
    register volatile struct td_clock *td = PA_TO_KVA1(RTC_BASE);
    return td->td_mem[offs];
}


__inline__ void
_sbd_nvram_setbyte(unsigned int offs, unsigned char val)
{
    register volatile struct td_clock *td = PA_TO_KVA1(RTC_BASE);
    td->td_mem[offs] = val;
}


/*
 * Always store shorts in little-endian format, so we don't
 * lose our environment when switching endianness.
 */
unsigned short
_sbd_nvram_getshort (unsigned int offs)
{
    return ((_sbd_nvram_getbyte(offs+1) << 8) | _sbd_nvram_getbyte(offs));
}


void
_sbd_nvram_setshort (unsigned int offs, unsigned short val)
{
    _sbd_nvram_setbyte (offs, val);
    _sbd_nvram_setbyte (offs+1, val >> 8);
}


int
_sbd_nvram_hwtest (void)
{
    unsigned int offs = ENVOFFSET + ENVOFF_TEST;

    _sbd_nvram_setbyte (offs, 0xaa);
    _sbd_nvram_setbyte (offs+1, 0x55);
    if (_sbd_nvram_getbyte (offs) != 0xaa
        || _sbd_nvram_getbyte (offs + 1) != 0x55)
	return 0;

    _sbd_nvram_setbyte (offs, 0x55);
    _sbd_nvram_setbyte (offs + 1, 0xaa);
    if (_sbd_nvram_getbyte (offs) != 0x55
        || _sbd_nvram_getbyte (offs + 1) != 0xaa)
	return 0;

    return 1;
}



#if !defined(ITBASE)

/*
 * Force environment reset if UART B's CTS & RTS are looped together 
 *
 * But omit if ITROM is present, because it will have already
 * handled this, and may have placed other status values in
 * the environment which we must read.
 */

#include "ns16550.h"

int
_sbd_env_force_reset ()
{
    int doreset = 1;
    volatile ns16550dev *dp;
    unsigned int omcr;
    int i;

    dp = (volatile ns16550dev *) PA_TO_KVA1 (UART1_BASE);
    omcr = dp->mcr;

    /* wiggle RTS four times */
    for (i = 0; i < 4 && doreset; i++) {

	/* check that we can force CTS off by clearing RTS */
	dp->mcr &= ~MCR_RTS; mips_wbflush(); 
	if ((dp->msr & MSR_CTS) != 0)
	    doreset = 0;

	/* check that we can force CTS on by setting RTS */
	dp->mcr |= MCR_RTS; mips_wbflush(); 
	if ((dp->msr & MSR_CTS) == 0)
	    doreset = 0;
    }

    dp->mcr = omcr; mips_wbflush();

    return (doreset);
}
#endif
