/*
 * Copyright (c) 1996-2003 MIPS Technologies, Inc.
 * 
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 
 *      * Redistributions of source code must retain the above copyright
 *        notice, this list of conditions and the following disclaimer.
 *      * Redistributions in binary form must reproduce the above
 *      copyright
 *        notice, this list of conditions and the following disclaimer
 *        in the documentation and/or other materials provided with
 *        the distribution.
 *      * Neither the name of MIPS Technologies Inc. nor the names of its
 *        contributors may be used to endorse or promote products derived
 *        from this software without specific prior written permission.
 * 
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * rs341.h: cpu board definitions for IDT RS341 eval board
 */


#ifndef _RS341_H_
#define _RS341_H_

#define LOCAL_MEM	0x00000000 	/* local memory */
#define LOCAL_MEM_SIZE	0x80000		/* local memory size (512Kb) */
#define PCAT_BASE	0x10400000 	/* pc/at interface */
#define DUART_BASE	0x10a00000 	/* S2681 duart */
#define PROM_BASE	0x1fc00000	/* prom */

/* hardware interrupts */
#define	INTR_SPARE1	2	/* spare 1:	sint 0 */
#define	INTR_DUART	3	/* duart:	sint 1 */
#define	INTR_MBOXPC	4	/* pc mailbox:	sint 2 */
#define INTR_SPARE2	5	/* centronics:	int  3 */
#define INTR_TCN	6	/* ???:		int  4 */
#define INTR_MBOX41N	7	/* 341 mailbox:	int  5 */

/*
 * Account for wacky address bus wiring to UART.
 */
#define S2681REGSZ	4
#define S2681BANK	0x200


/*
 * We also have to force bus-turnaround >= 2.5 cycles when accessing UART!
 */
#include <idt/r3041.h>

#ifndef __ASSEMBLER__

#define pre_s2681()						\
 ({unsigned long __busc = r3041_getbusc();			\
  r3041_setbusc (__busc ^ ((__busc ^ BUSC_BTA_2) & BUSC_BTA_3));	\
  __busc;})

#define post_s2681(x)						\
  r3041_setbusc(x)

#else

#define PRE_UART \
	.set noreorder;			\
	mfc0	t3,$busctrl;		\
	nop;				\
	xor	t2,t3,BUSC_BTA_2;	\
	and	t2,BUSC_BTA_3;		\
	xor	t2,t3;			\
	mtc0	t2,$busctrl;		\
	nop;				\
	.set reorder
	
#define POST_UART \
	mtc0	t3,$busctrl

#endif /* __ASSEMBLER__ */

#endif /* _RS341_H_ */
