#### 9.13.5 Register Naming

Register operands are always prefixed with ``%`'. The 80386 registers consist of

- the 8 32-bit registers ``%eax`' (the accumulator), ``%ebx`', ``%ecx`', ``%edx`', ``%edi`', ``%esi`', ``%ebp`' (the frame pointer), and ``%esp`' (the stack pointer).
- the 8 16-bit low-ends of these: ``%ax`', ``%bx`', ``%cx`', ``%dx`', ``%di`', ``%si`', ``%bp`', and ``%sp`'.
- the 8 8-bit registers: ``%ah`', ``%al`', ``%bh`', ``%bl`', ``%ch`', ``%cl`', ``%dh`', and ``%dl`' (These are the high-bytes and low-bytes of ``%ax`', ``%bx`', ``%cx`', and ``%dx`')
- the 6 section registers ``%cs`' (code section), ``%ds`' (data section), ``%ss`' (stack section), ``%es`', ``%fs`', and ``%gs`'.
- the 3 processor control registers ``%cr0`', ``%cr2`', and ``%cr3`'.
- the 6 debug registers ``%db0`', ``%db1`', ``%db2`', ``%db3`', ``%db6`', and ``%db7`'.
- the 2 test registers ``%tr6`' and ``%tr7`'.
- the 8 floating point register stack ``%st`' or equivalently ``%st(0)`', ``%st(1)`', ``%st(2)`', ``%st(3)`', ``%st(4)`', ``%st(5)`', ``%st(6)`', and ``%st(7)`'. These registers are overloaded by 8 MMX registers ``%mm0`', ``%mm1`', ``%mm2`', ``%mm3`', ``%mm4`', ``%mm5`', ``%mm6`' and ``%mm7`'.
- the 8 SSE registers registers ``%xmm0`', ``%xmm1`', ``%xmm2`', ``%xmm3`', ``%xmm4`', ``%xmm5`', ``%xmm6`' and ``%xmm7`'.

The AMD x86-64 architecture extends the register set by:

- enhancing the 8 32-bit registers to 64-bit: ``%rax`' (the accumulator), ``%rbx`', ``%rcx`', ``%rdx`', ``%rdi`', ``%rsi`', ``%rbp`' (the frame pointer), ``%rsp`' (the stack pointer)
- the 8 extended registers ``%r8`'–``%r15`'.
- the 8 32-bit low ends of the extended registers: ``%r8d`'–``%r15d`'
- the 8 16-bit low ends of the extended registers: ``%r8w`'–``%r15w`'
- the 8 8-bit low ends of the extended registers: ``%r8b`'–``%r15b`'
- the 4 8-bit registers: ``%sil`', ``%dil`', ``%bpl`', ``%spl`'.
- the 8 debug registers: ``%db8`'–``%db15`'.
- the 8 SSE registers: ``%xmm8`'–``%xmm15`'.