/*
 * Copyright (c) 1999-2005 MIPS Technologies, Inc.
 * 
 * All rights reserved.
 * 
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 
 *      * Redistributions of source code must retain the above copyright
 *        notice, this list of conditions and the following disclaimer.
 *      * Redistributions in binary form must reproduce the above
 *      copyright
 *        notice, this list of conditions and the following disclaimer
 *        in the documentation and/or other materials provided with
 *        the distribution.
 *      * Neither the name of MIPS Technologies Inc. nor the names of its
 *        contributors may be used to endorse or promote products derived
 *        from this software without specific prior written permission.
 * 
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/* 
 * elfmips.h: MIPS-specific ELF definitions
 */


#include <sys/elf.h>

/* MIPSABI program header special */
#define PT_MIPS_REGINFO		(PT_LOPROC + 0)

/* MIPSABI relocation (rel type) */
#define R_MIPS_NONE		0
#define R_MIPS_16		1
#define R_MIPS_32		2
#define R_MIPS_REL32		3
#define R_MIPS_26		4
#define R_MIPS_HI16		5
#define R_MIPS_LO16		6
#define R_MIPS_GPREL16		7
#define R_MIPS_LITERAL		8
#define R_MIPS_GOT16		9
#define R_MIPS_PC16		10
#define R_MIPS_CALL16		11
#define R_MIPS_GPREL32		12

/* old MIPS SDE relocation (rela type) */
#define R_SDE_8			0
#define R_SDE_16		1
#define R_SDE_32		2
#define R_SDE_ILA		35
#define R_SDE_IGPREL		36
#define R_SDE_ILAHI		37
#define R_SDE_ILALO		38
#define R_SDE_IBRA		39
#define R_SDE_IJMP		40
#define R_SDE_ILITERAL		41

/* MIPSABI special section numbers */
#define SHN_MIPS_ACOMMON	(SHN_LOPROC + 0)
#define SHN_MIPS_SCOMMON	(SHN_LOPROC + 3)
#define SHN_MIPS_SUNDEFINED	(SHN_LOPROC + 4)

/* MIPSABI special section types */
#define SHT_MIPS_LIBLIST	(SHT_LOPROC + 0)
#define SHT_MIPS_CONFLICT	(SHT_LOPROC + 2)
#define SHT_MIPS_GPTAB		(SHT_LOPROC + 3)
#define SHT_MIPS_UCODE		(SHT_LOPROC + 4)
#define SHT_MIPS_DEBUG		(SHT_LOPROC + 5)
#define SHT_MIPS_REGINFO	(SHT_LOPROC + 6)

/* MIPSABI special section flags */
#define SHF_MIPS_GPREL		0x10000000

/* MIPSABI processor specific flags */
#define EF_MIPS_NOREORDER	0x00000001
#define EF_MIPS_PIC		0x00000002
#define EF_MIPS_CPIC		0x00000004
#define EF_MIPS_ARCH		0xf0000000
#define  E_MIPS_ARCH_1		0x00000000 /* -mips1 */
#define  E_MIPS_ARCH_2		0x10000000 /* -mips2 */
#define  E_MIPS_ARCH_3		0x20000000 /* -mips3 */
#define  E_MIPS_ARCH_4		0x30000000 /* -mips4 */
#define  E_MIPS_ARCH_5		0x40000000 /* -mips5 */
#define  E_MIPS_ARCH_32		0x40000000 /* -mips32 */
#define  E_MIPS_ARCH_64		0x40000000 /* -mips64 */
/* The following are not MIPSABI, but MIPS SDE only */
#define EF_MIPS_CPU		0x00ff0000
#define  E_MIPS_CPU_STD		0x00000000       /* Base MIPS ISA */          
#define  E_MIPS_CPU_CW4		0x00010000       /* LSI CW401x */             
#define  E_MIPS_CPU_R4100	0x00020000       /* NEC Vr41xx */             
#define  E_MIPS_CPU_R4650	0x00030000       /* IDT R4650/4640 */         
#define  E_MIPS_CPU_R3900	0x00040000       /* Toshiba/Philips Rx900 */  
#define  E_MIPS_CPU_RM52XX	0x00050000       /* QED RM52xx/RM7000 */      
#define  E_MIPS_CPU_R54XX	0x00060000       /* NEC Vr54xx */             
#define  E_MIPS_CPU_R4320	0x00070000       /* NEC Vr4320 */             
#define  E_MIPS_CPU_RC3236X	0x00080000       /* IDT RC3236X */            
#define  E_MIPS_CPU_CW4001	0x00090000       /* LSI CW400x */             
#define EF_MIPS_NOGPCOUNT	0x00001000
#define EF_MIPS_GP32		0x04000000	/* -mips3+ -mgp32 */
#define EF_MIPS_FP32		0x08000000	/* -mips3+ -mfp32 */

#define DT_MIPS_RLD_VERSION	0x70000001
#define DT_MIPS_TIME_STAMP	0x70000002
#define DT_MIPS_ICHECKSUM	0x70000003
#define DT_MIPS_IVERSION	0x70000004
#define DT_MIPS_FLAGS		0x70000005
#define DT_MIPS_BASE_ADDRESS	0x70000006
#define DT_MIPS_CONFLICT	0x70000008
#define DT_MIPS_LIBLIST		0x70000009
#define DT_MIPS_LOCAL_GOTNO	0x7000000a
#define DT_MIPS_CONFLICTNO	0x7000000b
#define DT_MIPS_LIBLISTNO	0x70000010
#define DT_MIPS_SYMTABNO	0x70000011
#define DT_MIPS_UNREFEXTNO	0x70000012
#define DT_MIPS_GOTSYM		0x70000013
#define DT_MIPS_HIPAGENO	0x70000014
#define DT_MIPS_RLD_MAP		0x70000016

/* MIPSABI special sections */

/* .reginfo */
typedef struct {
    Elf32_Word		ri_gprmask;
    Elf32_Word		ri_cprmask[4];
    Elf32_Sword		ri_gp_value;
} Elf32_Reginfo;

#define ELFREGINFOSZ	sizeof(Elf32_Reginfo)

size_t elfReginfoWrite(FILE *,const Elf32_Ehdr *,const Elf32_Shdr *,
		       const Elf32_Reginfo *,size_t);
size_t elfReginfoRead(FILE *,const Elf32_Ehdr *,const Elf32_Shdr *,
		      Elf32_Reginfo *,size_t);

/* .gptab.xxx */
typedef union {
    struct {
	Elf32_Word		gt_current_g_value;
	Elf32_Word		gt_unused;
    } gt_header;
    struct {
	Elf32_Word		gt_g_value;
	Elf32_Word		gt_bytes;
    } gt_entry;
} Elf32_Gptab;

#define ELFGPTABSZ	sizeof(Elf32_Gptab)

size_t elfGptabRead(FILE *,const Elf32_Ehdr *,const Elf32_Shdr *,
		    Elf32_Gptab *,size_t);
size_t elfGptabWrite(FILE *,const Elf32_Ehdr *,const Elf32_Shdr *,
		   const Elf32_Gptab *,size_t);

